Another update. The C1E doesn't seem to be the real issue. I have discovered that it is not sufficient to enable it using wrmsr, but I actually have to suspend and resume the machine :-d After the resume, the C1E bit is enabled and something else (I don't know what, output from turbostat looksthe same, same ALPM in lspci).
Re: MSR
I have discovered that it is not sufficient to enable it using wrmsr, but I actually have to suspend and resume the machine :-d After the resume, the C1E bit is enabled and something else (I don't know what, output from turbostat looksthe same, same ALPM in lspci).
Here is debug before suspend (PC2 max)
https://gist.github.com/anonymous/703ea5a4026a333bacf0811f41280d62
And here is output after suspend (PC8 max)
https://gist.github.com/anonymous/8e53bc438792ed679c907a9685ce6c7d
So the differences are link state for 00:01.0 PCI bridge: Intel Corporation Skylake PCIe Controller (x16) (rev 07) (prog-if 00 [Normal decode])